X8R(R4socionext,uniphier-pxs3-refsocionext,uniphier-pxs3 &.7UniPhier PXs3 Reference Board (USB-Device #1)cpus cpu-mapcluster0core0=core1=core2=core3=cpu@0Acpuarm,cortex-a53MQ!Xpscifwcpu@1Acpuarm,cortex-a53MQ!Xpscifwcpu@2Acpuarm,cortex-a53MQ!Xpscifwcpu@3Acpuarm,cortex-a53MQ!Xpscifwl2-cachecacheopp-tableoperating-points-v2opp-250000000沀,opp-325000000_@,opp-500000000e,opp-650000000&6,opp-666667000',opp-8666670003I,opp-1000000000;,opp-1300000000M|m,psci arm,psci-1.0_smcclocksref fixed-clock}x@emmc-pwrseqmmc-pwrseq-emmc /timerarm,armv8-timer0   thermal-zonescpu-thermal)7 tripscpu-critGS Hcriticalcpu-alertGSHpassive cooling-mapsmap0^ 0creserved-memory rsecure-memory@81000000Mysoc@0 simple-bus rspi@54006000socionext,uniphier-scssiokayMT`  'default Q  spi@54006100socionext,uniphier-scssiokayMTa  defaultQ  serial@54006800socionext,uniphier-uartokayMTh@ !defaultQ serial@54006900socionext,uniphier-uart disabledMTi@ #defaultQ serial@54006a00socionext,uniphier-uartokayMTj@ %defaultQ serial@54006b00socionext,uniphier-uartokayMTk@ defaultQ gpio@55000000socionext,uniphier-gpioMU&0h$gpio_range0gpio_range1gpio_range2 $0 xirq4-hog.|7i2c@58780000socionext,uniphier-fi2cokayMXx  )defaultQ i2c@58781000socionext,uniphier-fi2cokayMXx  *defaultQ i2c@58782000socionext,uniphier-fi2cokayMXx   +defaultQ i2c@58783000socionext,uniphier-fi2c disabledMXx0  ,defaultQ i2c@58786000socionext,uniphier-fi2cMXx`  Q  system-bus@58c00000socionext,uniphier-system-busokayMX defaultrBethernet@1,1f00000smsc,lan9118smsc,lan9115 M=miiF& serial@1,1fb0000 ns16550a M S& smpctrl@59801000socionext,uniphier-smpctrlMYsyscon@598100001socionext,uniphier-pxs3-sdctrlsimple-mfdsysconMY"clock-controller!socionext,uniphier-pxs3-sd-clock reset-controller!socionext,uniphier-pxs3-sd-reset]!syscon@598200003socionext,uniphier-pxs3-perictrlsimple-mfdsysconMYclock-controller#socionext,uniphier-pxs3-peri-clock reset-controller#socionext,uniphier-pxs3-peri-reset]mmc@5a000000$socionext,uniphier-sd4hccdns,sd4hcMZ NdefaultQjt mmc@5a400000socionext,uniphier-sd-v3.1.1okayMZ@ L defaultuhs/Q 9host!jEVcp}"syscon@5f8000003socionext,uniphier-pxs3-soc-gluesimple-mfdsysconM_ $pinctrl socionext,uniphier-pxs3-pinctrlaoutaoutaoutain1ain1ain1ain2ain2ain2ainiec1ainiec1ainiec1aout1aout1aout1aout2aout2aout2aout3aout3aout3aoutiec1 aoutiec1 aoutiec1aoutiec2 aoutiec2 aoutiec2emmcemmcemmc_dat8emmcether-mii ether_mii ether_miiether-rgmii ether_rgmii ether_rgmii#txJRGMII0_TXCLKRGMII0_TXD0RGMII0_TXD1RGMII0_TXD2RGMII0_TXD3RGMII0_TXCTL ether-rmii ether_rmii ether_rmiiether1-rgmii ether1_rgmii ether1_rgmii&txJRGMII1_TXCLKRGMII1_TXD0RGMII1_TXD1RGMII1_TXD2RGMII1_TXD3RGMII1_TXCTL ether1-rmii ether1_rmii ether1_rmiii2c0i2c0i2c0i2c1i2c1i2c1i2c2i2c2i2c2i2c3i2c3i2c3i2c4i2c4i2c4i2c5i2c5i2c5i2c6i2c6i2c6nandnandnandCnand2csnandnand_cs1nandpciepciepciesdsdsdsd-uhssdsdsd1sd1sd1spi0spi0spi0 spi1spi1spi1spi2spi2spi2spi3spi3spi3system-bussystem_bussystem_bus_cs1 system_busuart0uart0uart0uart1uart1uart1uart2uart2uart2uart3uart3uart3usb0usb0usb0,usb0-device usb0_deviceusb0usb1usb1usb1usb1-device usb1_deviceusb1:usb2usb2usb2-usb3usb3usb3syscon@5f9000009socionext,uniphier-pxs3-soc-glue-debugsimple-mfdsysconM_   r_ efuse@100socionext,uniphier-efuseM(efuse@200socionext,uniphier-efuseMh trim@54,4MT4trim@55,4MU8trim@58,4MX>trim@59,4MYtrim@54,0MT5trim@55,0MU9trim@58,0MX?trim@59,0MYtrim@56,0MV6trim@5a,0MZ@dma-controller@5fc10000socionext,uniphier-xdmacM_S interrupt-controller@5fc20000socionext,uniphier-pxs3-aidetM_interrupt-controller@5fe00000 arm,gic-v3M__  syscon@618400002socionext,uniphier-pxs3-sysctrlsimple-mfdsysconMaclock-controllersocionext,uniphier-pxs3-clockreset-controllersocionext,uniphier-pxs3-reset]watchdogsocionext,uniphier-wdtthermal-sensor socionext,uniphier-pxs3-thermal "h ethernet@65000000socionext,uniphier-pxs3-ave4okayMe Bdefault# etherQ9ether =rgmii-id'$A%mdio ethernet-phy@0M%ethernet@65200000socionext,uniphier-pxs3-ave4okayMe  Cdefault& etherQ9ether =rgmii-id'$A'mdio ethernet-phy@0M'sata@65600000*socionext,uniphier-pxs3-ahcigeneric-ahciokayMe` Q(L^)sata-controller@65700000-socionext,uniphier-pxs3-ahci-gluesimple-mfdMep  represet-controller@0#socionext,uniphier-pxs3-ahci-resetM linkQ9link](sata-phy@10!socionext,uniphier-pxs3-ahci-phyM  linkphyQ 9linkphyc)sata@65800000*socionext,uniphier-pxs3-ahcigeneric-ahciokayMe Q*L^+sata-controller@65900000-socionext,uniphier-pxs3-ahci-gluesimple-mfdMe  rereset-controller@0#socionext,uniphier-pxs3-ahci-resetM linkQ9link]*sata-phy@10!socionext,uniphier-pxs3-ahci-phyM  linkphyQ 9linkphyc+usb@65a00000"socionext,uniphier-dwc3snps,dwc3okayMe ndwc_usb3 default,- refbus_earlysuspendQ   .^/012~hostusb-controller@65b00000-socionext,uniphier-pxs3-dwc3-gluesimple-mfdMe  rereset-controller@0#socionext,uniphier-pxs3-usb3-resetM] linkQ 9link .regulator@100'socionext,uniphier-pxs3-usb3-regulatorM linkQ 9link 3regulator@110'socionext,uniphier-pxs3-usb3-regulatorM linkQ 9link 7phy@200#socionext,uniphier-pxs3-usb3-hsphyMc  linkphyQ  9linkphy 3rtermsel_ths_i 456/phy@210#socionext,uniphier-pxs3-usb3-hsphyMc  linkphyQ  9linkphy 7rtermsel_ths_i 8960phy@300#socionext,uniphier-pxs3-usb3-ssphyMc  linkphyQ  9linkphy 31phy@310#socionext,uniphier-pxs3-usb3-ssphyMc  linkphyQ  9linkphy 72usb@65c00000"socionext,uniphier-dwc3snps,dwc3okayMe ndwc_usb3 default: refbus_earlysuspendQ   ;^<= ~peripheralusb2-phyusb3-phyusb-controller@65d00000-socionext,uniphier-pxs3-dwc3-gluesimple-mfdMe  rereset-controller@0#socionext,uniphier-pxs3-usb3-resetM] linkQ 9link ;regulator@100'socionext,uniphier-pxs3-usb3-regulatorM linkQ 9link regulator@110'socionext,uniphier-pxs3-usb3-regulatorM linkQ 9link phy@200#socionext,uniphier-pxs3-usb3-hsphyMc linkphyphy-extQ  9linkphy rtermsel_ths_i >?@<phy@300#socionext,uniphier-pxs3-usb3-ssphyMc linkphyphy-extQ  9linkphy =pcie@66000000socionext,uniphier-pcieokay dbilinkconfigMff/ Q*4AApci0r/ ndmamsiK`^AAAA pcie-phy^Blegacy-interrupt-controller& Aphy@66038000!socionext,uniphier-pxs3-pcie-phyMf@c linkQ9linkl$Bnand-controller@68000000#socionext,uniphier-denali-nand-v5bokay nand_datadenali_regMh h  AdefaultC nandnand_xeccQ 9nandregnand@0Mchosen}serial0:115200n8aliases/soc@0/serial@54006800,/soc@0/system-bus@58c00000/serial@1,1fb0000/soc@0/serial@54006a00/soc@0/serial@54006b00/soc@0/i2c@58780000/soc@0/i2c@58781000/soc@0/i2c@58782000/soc@0/i2c@58783000/soc@0/i2c@58786000/soc@0/spi@54006000/soc@0/spi@54006100/soc@0/ethernet@65000000/soc@0/ethernet@65200000memory@80000000AmemoryM compatible#address-cells#size-cellsinterrupt-parentmodelcpudevice_typeregclocksenable-methodnext-level-cacheoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzclock-latency-ns#clock-cellsclock-frequencyreset-gpiosinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerangesno-mapstatuspinctrl-namespinctrl-0resetsinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-rangesgpio-ranges-group-namesngpiossocionext,interrupt-rangesgpio-hoginputphy-modereg-io-widthreg-shift#reset-cellsbus-widthmmc-ddr-1_8vmmc-hs200-1_8vmmc-pwrseqcdns,phy-input-delay-legacycdns,phy-input-delay-mmc-highspeedcdns,phy-input-delay-mmc-ddrcdns,phy-dll-delay-sdclkcdns,phy-dll-delay-sdclk-hsmmcpinctrl-1reset-namescap-sd-highspeedsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50socionext,syscon-uhs-modegroupsfunctionpinsdrive-strengthbitsdma-channels#dma-cells#thermal-sensor-cellssocionext,tmod-calibrationclock-nameslocal-mac-addresssocionext,syscon-phy-modephy-handleports-implementedphys#phy-cellsinterrupt-namesdr_modevbus-supplynvmem-cell-namesnvmem-cellssnps,dis_enblslpm_quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirksnps,usb2-gadget-lpm-disablephy-namesreg-namesnum-lanesnum-viewportbus-rangeinterrupt-map-maskinterrupt-mapsocionext,sysconstdout-pathserial0serial1serial2serial3i2c0i2c1i2c2i2c3i2c6spi0spi1ethernet0ethernet1