>}8:X(%: 4socionext,uniphier-ld11-refsocionext,uniphier-ld11 &7UniPhier LD11 Reference Boardcpus cpu-mapcluster0core0=core1=cpu@0Acpuarm,cortex-a53MQ!Xpscifwcpu@1Acpuarm,cortex-a53MQ!Xpscifwl2-cachecacheopp-tableoperating-points-v2opp-245000000g@,opp-250000000沀,opp-4900000004΀,opp-500000000e,opp-653334000&,opp-666667000',opp-980000000:i,psci arm,psci-1.0_smcclocksref fixed-clock}x@emmc-pwrseqmmc-pwrseq-emmc !timerarm,armv8-timer0   reserved-memory secure-memory@81000000M soc@0 simple-bus spi@54006000socionext,uniphier-scssi disabledMT`  'default'Q 1 spi@54006100socionext,uniphier-scssi disabledMTa  default' Q 1 serial@54006800socionext,uniphier-uartokayMTh@ !default' Q 1 serial@54006900socionext,uniphier-uart disabledMTi@ #default' Q 1 serial@54006a00socionext,uniphier-uart disabledMTj@ %default'Q 1 serial@54006b00socionext,uniphier-uart disabledMTk@ default'Q 1 gpio@55000000socionext,uniphier-gpioMU&8M^n`z+3`Hgpio_range0gpio_range1gpio_range2gpio_range3gpio_range4gpio_range5$0xirq0-hogxaudio@56000000socionext,uniphier-ld11-aioMV default'aioQ(aio1(port@0endpointport@1endpointport@2endpoint i2sport@3endpointport@4endpoint i2sport@5endpointport@6endpointport@7endpointport@8endpointcodec@57900000socionext,uniphier-eveaMW eveaexivQ)*eveaexivadamv1)*port@0endpointport@1endpointsyscon@579200000socionext,uniphier-ld11-adamvsimple-mfdsysconMWreset-controller$socionext,uniphier-ld11-adamv-reset$i2c@58780000socionext,uniphier-fi2cokayMXx  )default'Q 1 eeprom@50microchip,24lc128atmel,24c128MP1@i2c@58781000socionext,uniphier-fi2c disabledMXx  *default'Q 1 i2c@58782000socionext,uniphier-fi2cMXx   +Q 1 i2c@58783000socionext,uniphier-fi2c disabledMXx0  ,default'Q 1 i2c@58784000socionext,uniphier-fi2c disabledMXx@  -default'Q 1 i2c@58785000socionext,uniphier-fi2cMXxP  Q 1 system-bus@58c00000socionext,uniphier-system-busokayMX default'Bethernet@1,1f00000smsc,lan9118smsc,lan9115 M:miiC&serial@1,1fb0000 ns16550a M P&smpctrl@59801000socionext,uniphier-smpctrlMYsyscon@598100001socionext,uniphier-ld11-sdctrlsimple-mfdsysconMYreset-controller!socionext,uniphier-ld11-sd-reset$syscon@598200003socionext,uniphier-ld11-perictrlsimple-mfdsysconMYclock-controller#socionext,uniphier-ld11-peri-clock reset-controller#socionext,uniphier-ld11-peri-reset$ mmc@5a000000$socionext,uniphier-sd4hccdns,sd4hcMZ Ndefault' Q1Zdq! usb@5a800100%socionext,uniphier-ehcigeneric-ehciokayMZ default'" Q###  1$$$ usb)%.usb@5a810100%socionext,uniphier-ehcigeneric-ehciokayMZ default'& Q## #  1$$ $ usb)'.usb@5a820100%socionext,uniphier-ehcigeneric-ehciokayMZ default'( Q## # 1$$ $usb)).syscon@5b3e00002socionext,uniphier-ld11-mioctrlsimple-mfdsysconM[>clock-controller"socionext,uniphier-ld11-mio-clock#reset-controller"socionext,uniphier-ld11-mio-reset$1$syscon@5f8000003socionext,uniphier-ld11-soc-gluesimple-mfdsysconM_ pinctrl socionext,uniphier-ld11-pinctrlaoutIaoutPaoutain1Iain1Pain1ain2Iain2Pain2ainiec1Iainiec1Painiec1aout1Iaout1Paout1aout2Iaout2Paout2aout3Iaout3Paout3aoutiec1 Iaoutiec1 Paoutiec1Yao1archAO1ARCYaoutiec2 Iaoutiec2 Paoutiec2emmcIemmcemmc_dat8Pemmc ether-mii Iether_mii Pether_miiether-rgmii Iether_rgmii Pether_rgmiiether-rmii Iether_rmii Pether_rmiiether1-rgmii Iether1_rgmii Pether1_rgmiiether1-rmii Iether1_rmii Pether1_rmiii2c0Ii2c0Pi2c0i2c1Ii2c1Pi2c1i2c2Ii2c2Pi2c2i2c3Ii2c3Pi2c3i2c4Ii2c4Pi2c4i2c5Ii2c5Pi2c5i2c6Ii2c6Pi2c6nandInandPnand+nand2csInandnand_cs1PnandpcieIpciePpciesdIsdPsdsd-uhsIsdPsdsd1Isd1Psd1spi0Ispi0Pspi0spi1Ispi1Pspi1 spi2Ispi2Pspi2spi3Ispi3Pspi3system-busIsystem_bussystem_bus_cs1 Psystem_busuart0Iuart0Puart0 uart1Iuart1Puart1 uart2Iuart2Puart2uart3Iuart3Puart3usb0Iusb0Pusb0"usb0-device Iusb0_devicePusb0usb1Iusb1Pusb1&usb1-device Iusb1_devicePusb1usb2Iusb2Pusb2(usb3Iusb3Pusb3usb-hub!socionext,uniphier-ld11-usb2-phy phy@0Mm%phy@1Mm'phy@2Mm)syscon@5f9000009socionext,uniphier-ld11-soc-glue-debugsimple-mfdsysconM_   _ efuse@100socionext,uniphier-efuseM(efuse@200socionext,uniphier-efuseMhdma-controller@5fc10000socionext,uniphier-xdmacM_S xinterrupt-controller@5fc20000socionext,uniphier-ld11-aidetM_8Minterrupt-controller@5fe00000 arm,gic-v3M__8M  syscon@618400002socionext,uniphier-ld11-sysctrlsimple-mfdsysconMaclock-controllersocionext,uniphier-ld11-clockreset-controllersocionext,uniphier-ld11-reset$watchdogsocionext,uniphier-wdtethernet@65000000socionext,uniphier-ld11-ave4okayMe BetherQether1 :internal*mdio ethernet-phy@1M*nand-controller@68000000#socionext,uniphier-denali-nand-v5b disablednand_datadenali_regMh h  Adefault'+nandnand_xeccQ nandreg1chosenserial0:115200n8aliases/soc@0/serial@54006800,/soc@0/system-bus@58c00000/serial@1,1fb0000/soc@0/serial@54006a00/soc@0/serial@54006b00/soc@0/i2c@58780000/soc@0/i2c@58781000/soc@0/i2c@58782000 /soc@0/i2c@58783000/soc@0/i2c@58784000/soc@0/i2c@58785000/soc@0/ethernet@65000000memory@80000000AmemoryM@ compatible#address-cells#size-cellsinterrupt-parentmodelcpudevice_typeregclocksenable-methodnext-level-cacheoperating-points-v2phandlecache-levelcache-unifiedopp-sharedopp-hzclock-latency-ns#clock-cellsclock-frequencyreset-gpiosinterruptsrangesno-mapstatuspinctrl-namespinctrl-0resetsinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-rangesgpio-ranges-group-namesngpiossocionext,interrupt-rangesgpio-hoginputclock-namesreset-names#sound-dai-cellssocionext,syscondai-formatremote-endpoint#reset-cellspagesizephy-modereg-io-widthreg-shiftbus-widthmmc-ddr-1_8vmmc-hs200-1_8vmmc-pwrseqcdns,phy-input-delay-legacycdns,phy-input-delay-mmc-highspeedcdns,phy-input-delay-mmc-ddrcdns,phy-dll-delay-sdclkcdns,phy-dll-delay-sdclk-hsmmcphy-namesphyshas-transaction-translatorgroupsfunctiondrive-strengthpins#phy-cellsdma-channels#dma-cellslocal-mac-addresssocionext,syscon-phy-modephy-handlereg-namesstdout-pathserial0serial1serial2serial3i2c0i2c1i2c2i2c3i2c4i2c5ethernet0