8|(K|Xrenesas,v3hskrenesas,r8a77980 &Renesas V3H Starter Kit boardcan fixed-clock,9Icpus cpu@0Qcpuarm,cortex-a53] ahvpsciIcpu@1Qcpuarm,cortex-a53] ahvpsciIcpu@2Qcpuarm,cortex-a53] ahvpsciIcpu@3Qcpuarm,cortex-a53] ahvpsciIcache-controllercachehIextal fixed-clock,9P*I extalr fixed-clock,9I pcie_bus fixed-clock,9I&pmu_a53arm,cortex-a53-pmu@TUVWpsciarm,psci-1.0arm,psci-0.2smcscif fixed-clock,9Isoc simple-bus watchdog@e6020000+renesas,r8a77980-wdtrenesas,rcar-gen3-wdt]   ah okay<gpio@e6050000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio]P / ;L ah gpio@e6051000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio]P / ;L ah Igpio@e6052000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio] P / @;L ah gpio@e6053000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio]0P / `;L ah gpio@e6054000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio]@P / ;L ah I#gpio@e6055000-renesas,gpio-r8a77980renesas,rcar-gen3-gpio]PP / ;L ah pinctrl@e6060000renesas,pfc-r8a77980] I getherBagether_mdio_agether_rgmiigether_txcrefclkgether_txcrefclk_megahgetherI!i2c0ai2c0hi2c0Iqspi0aqspi0_ctrlqspi0_data4hqspi0I%scif0 ascif0_datahscif0Iscif_clk ascif_clk_b hscif_clkItimer@e60f0000-renesas,r8a77980-cmt0renesas,rcar-gen3-cmt0] a/qfckh / disabledtimer@e6130000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1]`xyz{|}~ a.qfckh . disabledtimer@e6140000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1]`  a-qfckh - disabledtimer@e6148000-renesas,r8a77980-cmt1renesas,rcar-gen3-cmt1]` a,qfckh , disabledclock-controller@e6150000renesas,r8a77980-cpg-mssr]a  qextalextalr,}Ireset-controller@e6160000renesas,r8a77980-rst]system-controller@e6180000renesas,r8a77980-sysc]@}Ithermal@e6198000renesas,r8a77980-thermal ]$CDE a h  I7interrupt-controller@e61c0000&renesas,intc-ex-r8a77980renesas,irqc;L]H ah timer@e61e0000!renesas,tmu-r8a77980renesas,tmu]0$tuni0tuni1tuni2 a}qfckh } disabledtimer@e6fc0000!renesas,tmu-r8a77980renesas,tmu]00tuni0tuni1tuni2ticpi2 a|qfckh | disabledtimer@e6fd0000!renesas,tmu-r8a77980renesas,tmu]00/012tuni0tuni1tuni2ticpi2 a{qfckh { disabledtimer@e6fe0000!renesas,tmu-r8a77980renesas,tmu]00tuni0tuni1tuni2ticpi2 azqfckh z disabledtimer@ffc00000!renesas,tmu-r8a77980renesas,tmu]00tuvqtuni0tuni1tuni2ticpi2 ayqfckh y disabledi2c@e6500000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c]P@  ah    txrxtxrx okaydefault9hdmi@39 adi,adv7511w]9".:GVfrgb{1xports port@0]endpointI:port@1]endpointI8i2c@e6508000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c]P@   ah    txrxtxrx  disabledi2c@e6510000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c]Q@  ah    txrxtxrx  disabledi2c@e66d0000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c]m@ " ah   disabledi2c@e66d8000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c]m@  ah   disabledi2c@e66e0000+renesas,i2c-r8a77980renesas,rcar-gen3-i2c]n@  ah    txrxtxrx  disabledserial@e6540000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscif]T` aqfckbrg_intscif_clk  1 0 1 0 txrxtxrxh  disabledserial@e6550000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscif]U` aqfckbrg_intscif_clk  3 2 3 2 txrxtxrxh  disabledserial@e6560000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscif]V` aqfckbrg_intscif_clk  5 4 5 4 txrxtxrxh  disabledserial@e66a0000=renesas,hscif-r8a77980renesas,rcar-gen3-hscifrenesas,hscif]j` aqfckbrg_intscif_clk  7 6 7 6 txrxtxrxh  disabledpcie-phy@e65d0000renesas,r8a77980-pcie-phy]] a?h ? disabledI'can@e66c0000/renesas,r8a77980-canfdrenesas,rcar-gen3-canfd]l ch_intg_inta qfckcanfdcan_clk  bZh  disabledchannel0 disabledchannel1 disabledethernet@e68000005renesas,etheravb-r8a77980renesas,etheravb-rcar-gen3],'()*+,-./0123456789:;<=>?sch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15ch16ch17ch18ch19ch20ch21ch22ch23ch24 a,qfckh ,rgmii!  disabledpwm@e6e30000&renesas,pwm-r8a77980renesas,pwm-rcar] a h   disabledpwm@e6e31000&renesas,pwm-r8a77980renesas,pwm-rcar] a h   disabledpwm@e6e32000&renesas,pwm-r8a77980renesas,pwm-rcar]  a h   disabledpwm@e6e33000&renesas,pwm-r8a77980renesas,pwm-rcar]0 a h   disabledpwm@e6e34000&renesas,pwm-r8a77980renesas,pwm-rcar]@ a h   disabledserial@e6e60000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scif]@ aqfckbrg_intscif_clk  Q P Q P txrxtxrxh okaydefaultserial@e6e68000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scif]@ aqfckbrg_intscif_clk  S R S R txrxtxrxh  disabledserial@e6c50000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scif]@ aqfckbrg_intscif_clk  W V W V txrxtxrxh  disabledserial@e6c40000:renesas,scif-r8a77980renesas,rcar-gen3-scifrenesas,scif]@ aqfckbrg_intscif_clk  Y X Y X txrxtxrxh  disabledpwm@e6e80000!renesas,tpu-r8a77980renesas,tpu]H  a0h 0 disabledspi@e6e90000/renesas,msiof-r8a77980renesas,rcar-gen3-msiof]d  ah   disabledspi@e6ea0000/renesas,msiof-r8a77980renesas,rcar-gen3-msiof]d  ah   disabledspi@e6c00000/renesas,msiof-r8a77980renesas,rcar-gen3-msiof]d  ah   disabledspi@e6c10000/renesas,msiof-r8a77980renesas,rcar-gen3-msiof]d  ah   disabledvideo@e6ef0000renesas,vin-r8a77980]  a+h + disabledports port@1 ]endpoint@2]I*video@e6ef1000renesas,vin-r8a77980]  a*h  disabled*ports port@1 ]endpoint@2]I+video@e6ef2000renesas,vin-r8a77980]   a)h ) disabledports port@1 ]endpoint@2]I,video@e6ef3000renesas,vin-r8a77980]0  a(h ( disabledports port@1 ]endpoint@2]I-video@e6ef4000renesas,vin-r8a77980]@  a'h ' disabledports port@1 ]endpoint@3]I.video@e6ef5000renesas,vin-r8a77980]P  a&h & disabledports port@1 ]endpoint@3]I/video@e6ef6000renesas,vin-r8a77980]`  a%h % disabledports port@1 ]endpoint@3]I0video@e6ef7000renesas,vin-r8a77980]p  a$h $ disabledports port@1 ]endpoint@3] I1video@e6ef8000renesas,vin-r8a77980]   ath t disabledvideo@e6ef9000renesas,vin-r8a77980]   ash s  disabledvideo@e6efa000renesas,vin-r8a77980] ! aqh q  disabledvideo@e6efb000renesas,vin-r8a77980] ( ajh j  disabledvideo@e6efc000renesas,vin-r8a77980] * adh d  disabledvideo@e6efd000renesas,vin-r8a77980] + a`h `  disabledvideo@e6efe000renesas,vin-r8a77980] - a]h ] disabledvideo@e6eff000renesas,vin-r8a77980] . a\h \ disableddma-controller@e7300000(renesas,dmac-r8a77980renesas,rcar-dmac]04567abcdefghLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 aqfckh &     I dma-controller@e7310000(renesas,dmac-r8a77980renesas,rcar-dmac]1389:;<=>?ijklmnopLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 aqfckh &I ethernet@e7400000renesas,gether-r8a77980]@  a-h -" okay!defaultrgmii3">ethernet-phy@04ethernet-phy-id0022.1622ethernet-phy-ieee802.3-c22T]# `#I"iommu@e7740000renesas,ipmmu-r8a77980]tl$h Iiommu@ff8b0000renesas,ipmmu-r8a77980]l$hiommu@e67b0000renesas,ipmmu-r8a77980]{h I$iommu@ffc80000renesas,ipmmu-r8a77980]l$ h iommu@fe990000renesas,ipmmu-r8a77980]l$ h iommu@febd0000renesas,ipmmu-r8a77980]l$h I(iommu@e7b00000renesas,ipmmu-r8a77980]l$h iommu@e7960000renesas,ipmmu-r8a77980]l$ h mmc@ee140000-renesas,sdhi-r8a77980renesas,rcar-gen3-sdhi]  a: qcoreclkhh :   disabledspi@ee2000001renesas,r8a77980-rpc-ifrenesas,rcar-gen3-rpc-if0]  regsdirmapwbuf & ah  okay%defaultflash@0!spansion,s25fs512sjedec,spi-nor]partitionsfixed-partitions bootparam@0]cr7@40000]cert_header_sa3@c0000] bl2@140000]cert_header_sa6@180000]bl31@1c0000]Fuboot@640000]d uboot-env@700000]pdtb@740000]tkernel@7c0000]|@user@1bc0000]Dinterrupt-controller@f1010000 arm,gic-400; L@]   aqclkh Ipcie@fe000000-renesas,pcie-r8a77980renesas,pcie-rcar-gen3] Qpcip 00B88B$; a?&qpciepcie_bush ?' pcie(  disabledvsp@fea20000 renesas,vsp2]P  aoh o/)I3fcp@fea27000 renesas,fcpv]p a[h [(I)csi2@feaa0000renesas,r8a77980-csi2]  ah  disabledports port@0]port@1 ]endpoint@0]*Iendpoint@1]+Iendpoint@2],Iendpoint@3]-Icsi2@feab0000renesas,r8a77980-csi2]  ah  disabledports port@0]port@1 ]endpoint@0].Iendpoint@1]/Iendpoint@2]0Iendpoint@3]1I display@feb00000renesas,du-r8a77980] a2qdu.0dclkin.0h ;du.0G3okayports port@0]port@1]endpoint4I5lvds-encoder@feb90000renesas,r8a77980-lvds] ah okayports port@0]endpoint5I4port@1]endpoint6I9chipid@fff00044 renesas,prr]Dthermal-zonessensor1-thermalTjx7tripssensor1-passivesXpassivesensor1-critical Xcriticalsensor2-thermalTjx7tripssensor2-passivesXpassivesensor2-critical Xcriticaltimerarm,armv8-timer@   sec-physphysvirthyp-physaliases/soc/i2c@e6500000/soc/i2c@e6508000/soc/i2c@e6510000/soc/i2c@e66d0000/soc/i2c@e66d8000/soc/i2c@e66e0000/soc/serial@e6e60000/soc/ethernet@e7400000chosenserial0:115200n8hdmi-outhdmi-connectorXaportendpoint8Ilvds-decoderthine,thc63lvd1024ports port@0]endpoint9I6port@2]endpoint:Imemory@48000000Qmemory]Hxosc1-clock fixed-clock,9 I2regulator-0regulator-fixed VCC1V8_D4w@ w@%7Iregulator-1regulator-fixed VCC3V3_D52Z 2Z%7I compatible#address-cells#size-cellsmodel#clock-cellsclock-frequencyphandledevice_typeregclockspower-domainsnext-level-cacheenable-methodcache-unifiedcache-levelinterrupts-extendedinterrupt-affinityinterrupt-parentrangesinterruptsresetsstatustimeout-sec#gpio-cellsgpio-controllergpio-ranges#interrupt-cellsinterrupt-controllergroupsfunctionclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-namesdmasdma-namesi2c-scl-internal-delay-nspinctrl-0pinctrl-names#sound-dai-cellsavdd-supplydvdd-supplypvdd-supplybgvdd-supplydvdd-3v-supplyadi,input-depthadi,input-colorspaceadi,input-clockremote-endpoint#phy-cellsassigned-clocksassigned-clock-ratesphy-moderx-internal-delay-pstx-internal-delay-psiommus#pwm-cellsrenesas,id#dma-cellsdma-channelsphy-handlerenesas,no-ether-linkrxc-skew-psreset-gpiosrenesas,ipmmu-main#iommu-cellsmax-frequencyreg-namesspi-max-frequencyspi-rx-bus-widthread-onlybus-rangedma-rangesinterrupt-map-maskinterrupt-mapphysphy-namesiommu-mapiommu-map-maskrenesas,fcpreset-namesrenesas,vspspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisi2c0i2c1i2c2i2c3i2c4i2c5serial0ethernet0stdout-pathvcc-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-on