Ð þí®8\(R$  ,realtek,mjolnirrealtek,rtd16197Realtek Mjolnir EVBreserved-memory =rpc@2f000Dðrpc@1ffe000Dÿà@tee@10100000DðHcpus cpu@0Ocpu,arm,cortex-a55D[psciizcpu@100Ocpu,arm,cortex-a55D[psciizcpu@200Ocpu,arm,cortex-a55D[psciizcpu@300Ocpu,arm,cortex-a55D[psciizcpu@400Ocpu,arm,cortex-a55D[psciizcpu@500Ocpu,arm,cortex-a55D[psciiz l2-cache,cachei‚Žzl3-cache,cache‚Žztimer,arm,armv8-timer0œ   pmu,arm,cortex-a55-pmu œ§ psci ,arm,psci-1.0bsmcosc ,fixed-clockº›üÀÊosc27MÝsoc@0 ,simple-bus =à˜˜hbus@98000000 ,simple-busD˜   =˜ syscon@0,sysconsimple-mfdDê  =syscon@7000,sysconsimple-mfdDpê  =pserial@800,snps,dw-apb-uartD÷ê œDº›üÀokaysyscon@1a000,sysconsimple-mfdD ê  = syscon@1b000,sysconsimple-mfdD°ê  =°serial@200,snps,dw-apb-uartD÷ê œYº¿Ì disabledserial@400,snps,dw-apb-uartD÷ê œZº¿Ì disabledsyscon@1d000,sysconsimple-mfdDÐê  =Ðinterrupt-controller@ff100000 ,arm,gic-v3Dÿÿ  œ zmemory@2e000OmemoryDàý chosen.serial0:115200n8aliases+:/soc@0/bus@98000000/syscon@7000/serial@800,B/soc@0/bus@98000000/syscon@1b000/serial@200,J/soc@0/bus@98000000/syscon@1b000/serial@400 interrupt-parent#address-cells#size-cellscompatiblemodelrangesregno-mapdevice_typeenable-methodnext-level-cachephandlecache-levelcache-unifiedinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsreg-io-widthreg-shiftstatusinterrupt-controller#interrupt-cellsstdout-pathserial0serial1serial2