h(O4K ,mele,v9realtek,rtd12957MeLE V9reserved-memory =rpc@1f000Drpc@1ffe000D@tee@10100000DHarm-pmu,arm,cortex-a53-pmu O0Zosc ,fixed-clockm}osc27Msoc@0 ,simple-bus =bus@98000000 ,simple-busD   = syscon@0,sysconsimple-mfdD  =reset-controller@0,snps,dw-low-resetDreset-controller@4,snps,dw-low-resetDreset-controller@8,snps,dw-low-resetDreset-controller@50,snps,dw-low-resetDPsyscon@7000,sysconsimple-mfdDp  =preset-controller@88,snps,dw-low-resetDwatchdog@680,realtek,rtd1295-watchdogDserial@800,snps,dw-apb-uartDmokaysyscon@1a000,sysconsimple-mfdD  =syscon@1b000,sysconsimple-mfdD  =serial@200,snps,dw-apb-uartDm disabledserial@400,snps,dw-apb-uartDm disabledsyscon@1d000,sysconsimple-mfdD   = interrupt-controller@ff011000 ,arm,gic-400 D @ `  O cpus cpu@0cpu,arm,cortex-a53D cpu@1cpu,arm,cortex-a53D cpu@2cpu,arm,cortex-a53D cpu@3cpu,arm,cortex-a53D l2-cache,cache!- timer,arm,armv8-timer0O   memory@1f000memoryDaliases+;/soc@0/bus@98000000/syscon@7000/serial@800chosenCserial0:115200n8 interrupt-parent#address-cells#size-cellscompatiblemodelrangesregno-mapinterruptsinterrupt-affinityclock-frequency#clock-cellsclock-output-namesphandlereg-io-width#reset-cellsclocksreg-shiftresetsstatusinterrupt-controller#interrupt-cellsdevice_typenext-level-cachecache-levelcache-unifiedserial0stdout-path