^HT(  fsl,s32v234-evbfsl,s32v234 +7NXP S32V234-EVB2 Boardaliases"=/soc/bus@40000000/serial@40053000"E/soc/bus@40080000/serial@400bc000cpus+cpu@0Mcpuarm,cortex-a53Y ]spin-tablek|cpu@1Mcpuarm,cortex-a53Y ]spin-tablek|cpu@100Mcpuarm,cortex-a53Y ]spin-tablek|cpu@101Mcpuarm,cortex-a53Y ]spin-tablek|l2-cache0cachel2-cache1cachetimerarm,armv8-timer0   interrupt-controller@7d001000arm,cortex-a15-gic@Y}} }@ }`   soc+ simple-bus bus@40000000 simple-bus+ Y@serial@40053000fsl,s32v234-linflexuartY@0 ;okaybus@40080000 simple-bus+ Y@serial@400bc000fsl,s32v234-linflexuartY@  <okaychosenserial0:115200n8 compatibleinterrupt-parent#address-cells#size-cellsmodelserial0serial1device_typeregenable-methodcpu-release-addrnext-level-cachecache-levelcache-unifiedphandleinterruptsclock-frequency#interrupt-cellsinterrupt-controllerrangesstatusstdout-path