Ð þí p8 (h Ðnxp,s32g274a-evbnxp,s32g2 +*7NXP S32G2 Evaluation Board (S32G-VNP-EVB)reserved-memory+=shm@d0000000arm,scmi-shmemDЀHOcpus+cpu@0Wcpuarm,cortex-a53Dcpsciqcpu@1Wcpuarm,cortex-a53Dcpsciqcpu@100Wcpuarm,cortex-a53Dcpsciqcpu@101Wcpuarm,cortex-a53Dcpsciql2-cache0cache‚ŽOl2-cache1cache‚ŽOpmuarm,cortex-a53-pmu œtimerarm,armv8-timer0œ   firmwarescmi arm,scmi-smc§Âþ+²protocol@14D¸Opsci arm,psci-1.0jsmcsoc@0 simple-bus+=€pinctrl@4009c240nxp,s32g2-siul2-pinctrl0D@ Â@˜D,D€¼@ Ê@PD \Døjtag-pinsjtag-grp0ÅÌÙæ¦jtag-grp1Åæ¦jtag-grp2Å@Ìðæ¦jtag-grp3 Å#À#Ð# jtag-grp4ÅQÌÙæ¦serial@401c8000.nxp,s32g2-linflexuartfsl,s32v234-linflexuartD@€0 œRÿokayserial@401cc000.nxp,s32g2-linflexuartfsl,s32v234-linflexuartD@À0 œS ÿdisabledserial@402bc000.nxp,s32g2-linflexuartfsl,s32v234-linflexuartD@+À0 œT ÿdisabledmmc@402f0000nxp,s32g2-usdhcD@/ œ$ !  ipgahbperÿokay#interrupt-controller@50800000 arm,gic-v3(DP€PˆP@ PA PB  œ .COaliasesT/soc@0/serial@401c8000chosen\serial0:115200n8memory@80000000Wmemory D€€€€ compatibleinterrupt-parent#address-cells#size-cellsmodelrangesregno-mapphandledevice_typeenable-methodnext-level-cachecache-levelcache-unifiedinterruptsarm,smc-idshmem#clock-cellspinmuxinput-enablebias-pull-upslew-ratebias-pull-downstatusclocksclock-namesbus-widthdisable-wpinterrupt-controller#interrupt-cellsserial0stdout-path