Ð þí8 84 (k4hrenesas,bockwrenesas,r8a7778 +7bockwcpus+cpu@0=cpuarm,cortex-a9IM/¯]aliasesd/spi@fffc7000i/spi@fffc8000n/spi@fffc6000s/serial@ffe40000bus@1c000000 simple-bus+ {ethernet@18300000smsc,lan9220smsc,lan9115I0‚mii ‹–£³ethernet@fde00000.renesas,ether-r8a7778renesas,rcar-gen1-etherIýà ‹i]Á‚rmii+ Ïdisabledinterrupt-controller@fe438000 arm,pl390ÖçIþC€þCüinterrupt-controller@fe78001c0renesas,intc-irqpin-r8a7778renesas,intc-irqpinÖçÏokay0Iþxþxþx$þxDþxdþx0‹ügpio@ffc40000,renesas,gpio-r8a7778renesas,rcar-gen1-gpioIÿÄ, ‹g%5 Öçgpio@ffc41000,renesas,gpio-r8a7778renesas,rcar-gen1-gpioIÿÄ, ‹g%5 Öçgpio@ffc42000,renesas,gpio-r8a7778renesas,rcar-gen1-gpioIÿÄ , ‹g%5@ Öçgpio@ffc43000,renesas,gpio-r8a7778renesas,rcar-gen1-gpioIÿÄ0, ‹g%5` Öçügpio@ffc44000,renesas,gpio-r8a7778renesas,rcar-gen1-gpioIÿÄ@, ‹g%5€Öçpinctrl@fffc0000renesas,pfc-r8a7778IÿüAKdefaultüscif0Yscif0_data_ascif0_ctrl`scif0üscif_clk Yscif_clk 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compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregclock-frequencyclocksspi0spi1spi2serial0rangesphy-modeinterruptsreg-io-widthvddvario-supplyvdd33a-supplypower-domainsstatus#interrupt-cellsinterrupt-controllerphandlesense-bitfield-width#gpio-cellsgpio-controllergpio-rangespinctrl-0pinctrl-namesgroupsfunctionbias-pull-up#sound-dai-cellsi2c-scl-internal-delay-nsclock-names#renesas,channelsuart-has-rtsctsvmmc-supplybus-widthbroken-cdwp-gpiosspi-max-frequencym25p,fast-readlabel#clock-cellsclock-output-names#power-domain-cellsclock-divclock-multclock-indicesbootargsstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersound-daisystem-clock-frequency